Progress in GaAs
material processing and device development in 1970s has led to the feasibility
of the monolithic microwave integrated circuit, where active components
required for a given circuit can be grown or implanted in the substrate.
The substrate of
an mmic is a semiconductor material and accomadate fabrication of active
devices. GaAs is probably the most common substrate for mmic but silicon,
silicon-on-sapphire and indium phosphide are also used.
Transmission line
and other conductors are usually made with gold metallization. To improve
adhesive of the gold to the substrate a thin layer of chromium or titanium is
generally deposited first. These metals are relatively lossy,so the gold layer
must be made at least several skin depths thick to reduce attenuation.
Designing an mmic
requires extensive use of CAD software, for circuit design and optimization as
well as mask generation. Careful consideration must be given in the circuit
design to allow for component variations and tolerance and the fact that
circuit trimming after fabrication will be difficult or impossible. Thus
effects such as transmission line discontinuities, bias n/w, spurious coupling
and package resonance must be taken into account.
After circuit
design has been finalized, the masks can be generated one or more mask are
generally required for each processing step. Processing begins by forming an
active layer in the semiconductor substrate for the necessary active devices.
This can be done by ion implantation or by epitaxial techniques. Then active
areas are isolated by etching or additional implantation, leaving mesas for the
active devices.
Next ohmic
contacts are made to the active devices area by allowing a gold layer onto the
substrate. FET gates are then formed with titanium/platinum/gold compound
deposited b/w the source and the drain.
At this time, the
active devices processing is complete and intermediate test are taken. If it meets specifications, the next step is
to deposit the first layer of metallization for contacts, transmission lines,
inductors and other conducting areas then resistors are formed by depositing
resistive field and dielectric film req. for capacitors. A second layer of
materialization completes the formation of capacitors and overlays are
deposited. A second layer of materialization completes.
The final
processing steps involve bottom or backside of substrate. First it is lapped to
the req. thickness, then via holes are formed by etching and plating. Via holes
provide ground connections to the circuitry on the top side of the substrate
and provide a heat dissipation path from the active devices to the ground
plane. After the processing has been completed, the individual circuits can be
cut from the wafer and tested.